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Connectors

Expansion Connectors

The expansion interface on the board is comprised of two headers P8 (46 pin) & P9 (50 pin). All signals on the expansion headers are 3.3V unless otherwise indicated.

Note

Do not connect 5V logic level signals to these pins or the board will be damaged.

Note

DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.

NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.

Connector P8

The following tables show the pinout of the P8 expansion header. The SW is responsible for setting the default function of each pin. Refer to the processor documentation for more information on these pins and detailed descriptions of all of the pins listed. In some cases there may not be enough signals to complete a group of signals that may be required to implement a total interface.

The column heading is the pin number on the expansion header.

The GPIO row is the expected gpio identifier number in the Linux kernel.

Each row includes the gpiochipX and pinY in the format of X Y. You can use these values to directly control the GPIO pins with the commands shown below.

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset X Y=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset X Y=0

For Example:

+---------+----------+
| Pin     | P8.03    |
+=========+==========+
| GPIO    | 1 20     |
+---------+----------+

Use the commands below for controlling this pin (P8.03) where X = 1 and Y = 20

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset 1 20=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset 1 20=0

The BALL row is the pin number on the processor.

The REG row is the offset of the control register for the processor pin.

The MODE # rows are the mode setting for each pin. Setting each mode to align with the mode column will give that function on that pin.

NOTES:

DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.

NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.

P8.E1-P8.E4

E1

E2

E3

E4

USB1 DP

USB1 DN

VSYS_5V0

GND

P8.01-P8.02

P8.01

P8.02

GND

GND

P8.03-P8.05

Pin

P8.03

P8.04

P8.05

GPIO

1 20

1 48

1 33

BALL

AH21

AC29

AH25

REG

0x00011C054

0x00011C0C4

0x00011C088

Page

46

30

50

MODE 0

PRG1_PRU0_GPO19

PRG0_PRU0_GPO5

PRG1_PRU1_GPO12

1

PRG1_PRU0_GPI19

PRG0_PRU0_GPI5

PRG1_PRU1_GPI12

2

PRG1_IEP0_EDC_SYNC_OUT0

~

PRG1_RGMII2_TD1

3

PRG1_PWM0_TZ_OUT

PRG0_PWM3_B2

PRG1_PWM1_A0

4

~

~

RGMII2_TD1

5

RMII5_TXD0

RMII3_TXD0

~

6

MCAN6_TX

~

MCAN7_TX

7

GPIO0_20

GPIO0_48

GPIO0_33

8

~

GPMC0_AD0

RGMII8_TD1

9

~

~

~

10

VOUT0_EXTPCLKIN

~

VOUT0_DATA12

11

VPFE0_PCLK

~

~

12

MCASP4_AFSX

MCASP0_AXR3

MCASP9_AFSX

13

~

~

~

14

~

~

~

Bootstrap

~

BOOTMODE2

~

P8.06-P8.09

Pin

P8.06

P8.07

P8.08

P8.09

GPIO

1 34

1 15

1 14

1 17

BALL

AG25

AD24

AG24

AE24

REG

0x00011C08C

0x00011C03C

0x00011C038

0x00011C044

Page

51

44

44

45

MODE 0

PRG1_PRU1_GPO13

PRG1_PRU0_GPO14

PRG1_PRU0_GPO13

PRG1_PRU0_GPO16

1

PRG1_PRU1_GPI13

PRG1_PRU0_GPI14

PRG1_PRU0_GPI13

PRG1_PRU0_GPI16

2

PRG1_RGMII2_TD2

PRG1_RGMII1_TD3

PRG1_RGMII1_TD2

PRG1_RGMII1_TXC

3

PRG1_PWM1_B0

PRG1_PWM0_A1

PRG1_PWM0_B0

PRG1_PWM0_A2

4

RGMII2_TD2

RGMII1_TD3

RGMII1_TD2

RGMII1_TXC

5

~

~

~

~

6

MCAN7_RX

MCAN5_RX

MCAN5_TX

MCAN6_RX

7

GPIO0_34

GPIO0_15

GPIO0_14

GPIO0_17

8

RGMII8_TD2

~

~

~

9

~

RGMII7_TD3

RGMII7_TD2

RGMII7_TXC

10

VOUT0_DATA13

VOUT0_DATA19

VOUT0_DATA18

VOUT0_DATA21

11

VPFE0_DATA8

VPFE0_DATA3

VPFE0_DATA2

VPFE0_DATA5

12

MCASP9_AXR0

MCASP7_AXR1

MCASP7_AXR0

MCASP7_AXR3

13

MCASP4_ACLKR

~

~

MCASP7_AFSR

14

~

~

~

~

Bootstrap

~

~

~

~

P8.10-P8.13

Pin

P8.10

P8.11

P8.12

P8.13

GPIO

1 16

1 60

1 59

1 89

BALL

AC24

AB24

AH28

V27

REG

0x00011C040

0x00011C0F4

0x00011C0F0

0x00011C168

Page

44

33

33

56

MODE 0

PRG1_PRU0_GPO15

PRG0_PRU0_GPO17

PRG0_PRU0_GPO16

RGMII5_TD1

1

PRG1_PRU0_GPI15

PRG0_PRU0_GPI17

PRG0_PRU0_GPI16

RMII7_TXD1

2

PRG1_RGMII1_TX_CTL

PRG0_IEP0_EDC_SYNC_OUT1

PRG0_RGMII1_TXC

I2C3_SCL

3

PRG1_PWM0_B1

PRG0_PWM0_B2

PRG0_PWM0_A2

~

4

RGMII1_TX_CTL

PRG0_ECAP0_SYNC_OUT

RGMII3_TXC

VOUT1_DATA4

5

~

~

~

TRC_DATA2

6

MCAN6_TX

~

~

EHRPWM0_B

7

GPIO0_16

GPIO0_60

GPIO0_59

GPIO0_89

8

~

GPMC0_AD5

~

GPMC0_A5

9

RGMII7_TX_CTL

OBSCLK1

~

~

10

VOUT0_DATA20

~

DSS_FSYNC1

~

11

VPFE0_DATA4

~

~

~

12

MCASP7_AXR2

MCASP0_AXR13

MCASP0_AXR12

MCASP11_ACLKX

13

MCASP7_ACLKR

~

~

~

14

~

~

~

~

Bootstrap

~

BOOTMODE7

~

~

P8.14-P8.16

Pin

P8.14

P8.15

P8.16

GPIO

1 75

1 61

1 62

BALL

AF27

AB29

AB28

REG

0x00011C130

0x00011C0F8

0x00011C0FC

Page

37

33

34

MODE 0

PRG0_PRU1_GPO12

PRG0_PRU0_GPO18

PRG0_PRU0_GPO19

1

PRG0_PRU1_GPI12

PRG0_PRU0_GPI18

PRG0_PRU0_GPI19

2

PRG0_RGMII2_TD1

PRG0_IEP0_EDC_LATCH_IN0

PRG0_IEP0_EDC_SYNC_OUT0

3

PRG0_PWM1_A0

PRG0_PWM0_TZ_IN

PRG0_PWM0_TZ_OUT

4

RGMII4_TD1

PRG0_ECAP0_IN_APWM_OUT

~

5

~

~

~

6

~

~

~

7

GPIO0_75

GPIO0_61

GPIO0_62

8

~

GPMC0_AD6

GPMC0_AD7

9

~

~

~

10

~

~

~

11

~

~

~

12

MCASP1_AXR8

MCASP0_AXR14

MCASP0_AXR15

13

~

~

~

14

UART8_CTSn

~

~

Bootstrap

~

~

~

P8.17-P8.19

Pin

P8.17

P8.18

P8.19

GPIO

1 3

1 4

1 88

BALL

AF22

AJ23

V29

REG

0x00011C00C

0x00011C010

0x00011C164

Page

40

40

57

MODE 0

PRG1_PRU0_GPO2

PRG1_PRU0_GPO3

RGMII5_TD2

1

PRG1_PRU0_GPI2

PRG1_PRU0_GPI3

UART3_TXD

2

PRG1_RGMII1_RD2

PRG1_RGMII1_RD3

~

3

PRG1_PWM2_A0

PRG1_PWM3_A2

SYNC3_OUT

4

RGMII1_RD2

RGMII1_RD3

VOUT1_DATA3

5

RMII1_CRS_DV

RMII1_RX_ER

TRC_DATA1

6

~

~

EHRPWM0_A

7

GPIO0_3

GPIO0_4

GPIO0_88

8

GPMC0_WAIT1

GPMC0_DIR

GPMC0_A4

9

RGMII7_RD2

RGMII7_RD3

~

10

~

~

~

11

~

~

~

12

MCASP6_AXR0

MCASP6_AXR1

MCASP10_AXR1

13

~

~

~

14

UART1_RXD

UART1_TXD

~

Bootstrap

~

~

~

P8.20-P8.22

Pin

P8.20

P8.21

P8.22

GPIO

1 76

1 30

1 5

BALL

AF26

AF21

AH23

REG

0x00011C134

0x00011C07C

0x00011C014

Page

37

49

41

MODE 0

PRG0_PRU1_GPO13

PRG1_PRU1_GPO9

PRG1_PRU0_GPO4

1

PRG0_PRU1_GPI13

PRG1_PRU1_GPI9

PRG1_PRU0_GPI4

2

PRG0_RGMII2_TD2

PRG1_UART0_RXD

PRG1_RGMII1_RX_CTL

3

PRG0_PWM1_B0

~

PRG1_PWM2_B0

4

RGMII4_TD2

SPI6_CS3

RGMII1_RX_CTL

5

~

RMII6_RXD1

RMII1_TXD0

6

~

MCAN8_TX

~

7

GPIO0_76

GPIO0_30

GPIO0_5

8

~

GPMC0_CSn0

GPMC0_CSn2

9

~

PRG1_IEP0_EDIO_DATA_IN_OUT30

RGMII7_RX_CTL

10

~

VOUT0_DATA9

~

11

~

~

~

12

MCASP1_AXR9

MCASP4_AXR3

MCASP6_AXR2

13

~

~

MCASP6_ACLKR

14

UART8_RTSn

~

UART2_RXD

Bootstrap

~

~

~

P8.23-P8.26

Pin

P8.23

P8.24

P8.25

P8.26

GPIO

1 31

1 6

1 35

1 51

BALL

AB23

AD20

AH26

AC27

REG

0x00011C080

0x00011C018

0x00011C090

0x00011C0D0

Page

50

41

51

31

MODE 0

PRG1_PRU1_GPO10

PRG1_PRU0_GPO5

PRG1_PRU1_GPO14

PRG0_PRU0_GPO8

1

PRG1_PRU1_GPI10

PRG1_PRU0_GPI5

PRG1_PRU1_GPI14

PRG0_PRU0_GPI8

2

PRG1_UART0_TXD

~

PRG1_RGMII2_TD3

~

3

PRG1_PWM2_TZ_IN

PRG1_PWM3_B2

PRG1_PWM1_A1

PRG0_PWM2_A1

4

~

~

RGMII2_TD3

~

5

RMII6_CRS_DV

RMII1_TX_EN

~

~

6

MCAN8_RX

~

MCAN8_TX

MCAN9_RX

7

GPIO0_31

GPIO0_6

GPIO0_35

GPIO0_51

8

GPMC0_CLKOUT

GPMC0_WEn

RGMII8_TD3

GPMC0_AD2

9

PRG1_IEP0_EDIO_DATA_IN_OUT31

~

~

~

10

VOUT0_DATA10

~

VOUT0_DATA14

~

11

GPMC0_FCLK_MUX

~

~

~

12

MCASP5_ACLKX

MCASP3_AXR0

MCASP9_AXR1

MCASP0_AXR6

13

~

~

MCASP4_AFSR

~

14

~

~

~

UART6_RXD

Bootstrap

~

BOOTMODE0

~

~

P8.27-P8.29

Pin

P8.27

P8.28

P8.29

GPIO

1 71

1 72

1 73

BALL

AA28

Y24

AA25

REG

0x00011C120

0x00011C124

0x00011C128

Page

36

36

36

MODE 0

PRG0_PRU1_GPO8

PRG0_PRU1_GPO9

PRG0_PRU1_GPO10

1

PRG0_PRU1_GPI8

PRG0_PRU1_GPI9

PRG0_PRU1_GPI10

2

~

PRG0_UART0_RXD

PRG0_UART0_TXD

3

PRG0_PWM2_TZ_OUT

~

PRG0_PWM2_TZ_IN

4

~

SPI3_CS3

~

5

~

~

~

6

MCAN11_RX

PRG0_IEP0_EDIO_DATA_IN_OUT30

PRG0_IEP0_EDIO_DATA_IN_OUT31

7

GPIO0_71

GPIO0_72

GPIO0_73

8

GPMC0_AD10

GPMC0_AD11

GPMC0_AD12

9

~

~

CLKOUT

10

~

DSS_FSYNC3

~

11

~

~

~

12

MCASP1_AFSX

MCASP1_AXR5

MCASP1_AXR6

13

~

~

~

14

~

UART8_RXD

UART8_TXD

Bootstrap

~

~

~

P8.30-P8.32

Pin

P8.30

P8.31

~

P8.32

~

GPIO

1 74

1 32

1 63

1 26

1 64

BALL

AG26

AJ25

AE29

AG21

AD28

REG

0x00011C12C

0x00011C084

0x00011C100

0x00011C06C

0x00011C104

Page

37

50

34

48

34

MODE 0

PRG0_PRU1_GPO11

PRG1_PRU1_GPO11

PRG0_PRU1_GPO0

PRG1_PRU1_GPO5

PRG0_PRU1_GPO1

1

PRG0_PRU1_GPI11

PRG1_PRU1_GPI11

PRG0_PRU1_GPI0

PRG1_PRU1_GPI5

PRG0_PRU1_GPI1

2

PRG0_RGMII2_TD0

PRG1_RGMII2_TD0

PRG0_RGMII2_RD0

~

PRG0_RGMII2_RD1

3

~

~

~

~

~

4

RGMII4_TD0

RGMII2_TD0

RGMII4_RD0

~

RGMII4_RD1

5

RMII4_TX_EN

RMII2_TX_EN

RMII4_RXD0

RMII5_TX_EN

RMII4_RXD1

6

~

~

~

MCAN6_RX

~

7

GPIO0_74

GPIO0_32

GPIO0_63

GPIO0_26

GPIO0_64

8

GPMC0_A26

RGMII8_TD0

UART4_CTSn

GPMC0_WPn

UART4_RTSn

9

~

EQEP1_I

~

EQEP1_S

~

10

~

VOUT0_DATA11

~

VOUT0_DATA5

~

11

~

~

~

~

~

12

MCASP1_AXR7

MCASP9_ACLKX

MCASP1_AXR0

MCASP4_AXR0

MCASP1_AXR1

13

~

~

~

~

~

14

~

~

UART5_RXD

TIMER_IO4

UART5_TXD

Bootstrap

~

~

~

~

~

P8.33-P8.35

Pin

P8.33

~

P8.34

P8.35 | ~

GPIO

1 25

1 111

1 7

1 24

1 116

BALL

AH24

AA2

AD22

AD23

Y3

REG

0x00011C068

0x00011C1C0

0x00011C01C

0x00011C064

0x00011C1D4

Page

48

67

41

47

67

MODE 0

PRG1_PRU1_GPO4

SPI0_CS0

PRG1_PRU0_GPO6

PRG1_PRU1_GPO3

SPI1_CS0

1

PRG1_PRU1_GPI4

UART0_RTSn

PRG1_PRU0_GPI6

PRG1_PRU1_GPI3

UART0_CTSn

2

PRG1_RGMII2_RX_CTL

~

PRG1_RGMII1_RXC

PRG1_RGMII2_RD3

~

3

PRG1_PWM2_B2

~

PRG1_PWM3_A1

~

UART5_RXD

4

RGMII2_RX_CTL

~

RGMII1_RXC

RGMII2_RD3

~

5

RMII2_TXD0

~

RMII1_TXD1

RMII2_RX_ER

~

6

~

~

AUDIO_EXT_REFCLK0

~

PRG0_IEP0_EDIO_OUTVALID

7

GPIO0_25

GPIO0_111

GPIO0_7

GPIO0_24

GPIO0_116

8

RGMII8_RX_CTL

~

GPMC0_CSn3

RGMII8_RD3

PRG0_IEP0_EDC_LATCH_IN0

9

EQEP1_B

~

RGMII7_RXC

EQEP1_A

~

10

VOUT0_DATA4

~

~

VOUT0_DATA3

~

11

VPFE0_DATA13

~

~

VPFE0_WEN

~

12

MCASP8_AXR2

~

MCASP6_AXR3

MCASP8_AXR1

~

13

MCASP8_ACLKR

~

MCASP6_AFSR

MCASP3_AFSR

~

14

TIMER_IO3

~

UART2_TXD

TIMER_IO2

~

Bootstrap

~

~

~

~

~

P8.36-P8.38

Pin

P8.36

P8.37

~

P8.38

~

GPIO

1 8

1 106

1 11

1 105

1 9

BALL

AE20

Y27

AD21

Y29

AJ20

REG

0x00011C020

0x00011C1AC

0x00011C02C

0x00011C1A8

0x00011C024

Page

42

58

43

58

42

MODE 0

PRG1_PRU0_GPO7

RGMII6_RD2

PRG1_PRU0_GPO10

RGMII6_RD3

PRG1_PRU0_GPO8

1

PRG1_PRU0_GPI7

UART4_RTSn

PRG1_PRU0_GPI10

UART4_CTSn

PRG1_PRU0_GPI8

2

PRG1_IEP0_EDC_LATCH_IN1

~

PRG1_UART0_RTSn

~

~

3

PRG1_PWM3_B1

UART5_TXD

PRG1_PWM2_B1

UART5_RXD

PRG1_PWM2_A1

4

~

~

SPI6_CS2

CLKOUT

~

5

AUDIO_EXT_REFCLK1

TRC_DATA19

RMII5_CRS_DV

TRC_DATA18

RMII5_RXD0

6

MCAN4_TX

EHRPWM5_A

~

EHRPWM_TZn_IN4

MCAN4_RX

7

GPIO0_8

GPIO0_106

GPIO0_11

GPIO0_105

GPIO0_9

8

~

GPMC0_A22

GPMC0_BE0n_CLE

GPMC0_A21

GPMC0_OEn_REn

9

~

~

PRG1_IEP0_EDIO_DATA_IN_OUT29

~

~

10

~

~

OBSCLK2

~

VOUT0_DATA22

11

~

~

~

~

~

12

MCASP3_AXR1

MCASP11_AXR5

MCASP3_AFSX

MCASP11_AXR4

MCASP3_AXR2

13

~

~

~

~

~

14

~

~

~

~

~

Bootstrap

~

~

~

~

~

P8.39-P8.41

Pin

P8.39

P8.40

P8.41

GPIO

1 69

1 70

1 67

BALL

AC26

AA24

AD29

REG

0x00011C118

0x00011C11C

0x00011C110

Page

35

36

35

MODE 0

PRG0_PRU1_GPO6

PRG0_PRU1_GPO7

PRG0_PRU1_GPO4

1

PRG0_PRU1_GPI6

PRG0_PRU1_GPI7

PRG0_PRU1_GPI4

2

PRG0_RGMII2_RXC

PRG0_IEP1_EDC_LATCH_IN1

PRG0_RGMII2_RX_CTL

3

~

~

PRG0_PWM2_B2

4

RGMII4_RXC

SPI3_CS0

RGMII4_RX_CTL

5

RMII4_TXD0

~

RMII4_TXD1

6

~

MCAN11_TX

~

7

GPIO0_69

GPIO0_70

GPIO0_67

8

GPMC0_A25

GPMC0_AD9

GPMC0_A24

9

~

~

~

10

~

~

~

11

~

~

~

12

MCASP1_AXR3

MCASP1_AXR4

MCASP1_AXR2

13

~

~

~

14

~

UART2_TXD

~

Bootstrap

~

~

~

P8.42-P8.44

Pin

P8.42

P8.43

P8.44

GPIO

1 68

1 65

1 66

BALL

AB27

AD27

AC25

REG

0x00011C114

0x00011C108

0x00011C10C

Page

35

34

35

MODE 0

PRG0_PRU1_GPO5

PRG0_PRU1_GPO2

PRG0_PRU1_GPO3

1

PRG0_PRU1_GPI5

PRG0_PRU1_GPI2

PRG0_PRU1_GPI3

2

~

PRG0_RGMII2_RD2

PRG0_RGMII2_RD3

3

~

PRG0_PWM2_A2

~

4

~

RGMII4_RD2

RGMII4_RD3

5

~

RMII4_CRS_DV

RMII4_RX_ER

6

~

~

~

7

GPIO0_68

GPIO0_65

GPIO0_66

8

GPMC0_AD8

GPMC0_A23

~

9

~

~

~

10

~

~

~

11

~

~

~

12

MCASP1_ACLKX

MCASP1_ACLKR

MCASP1_AFSR

13

~

MCASP1_AXR10

MCASP1_AXR11

14

~

~

~

Bootstrap

BOOTMODE6

~

~

P8.45-P8.46

Pin

P8.45

P8.46

GPIO

1 79

1 80

BALL

AG29

Y25

REG

0x00011C140

0x00011C144

Page

38

38

MODE 0

PRG0_PRU1_GPO16

PRG0_PRU1_GPO17

1

PRG0_PRU1_GPI16

PRG0_PRU1_GPI17

2

PRG0_RGMII2_TXC

PRG0_IEP1_EDC_SYNC_OUT1

3

PRG0_PWM1_A2

PRG0_PWM1_B2

4

RGMII4_TXC

SPI3_CLK

5

~

~

6

~

~

7

GPIO0_79

GPIO0_80

8

~

GPMC0_AD13

9

~

~

10

~

~

11

~

~

12

MCASP2_AXR2

MCASP2_AXR3

13

~

~

14

~

~

Bootstrap

~

BOOTMODE3

Connector P9

The following tables show the pinout of the P9 expansion header. The SW is responsible for setting the default function of each pin. Refer to the processor documentation for more information on these pins and detailed descriptions of all of the pins listed. In some cases there may not be enough signals to complete a group of signals that may be required to implement a total interface.

The column heading is the pin number on the expansion header.

The GPIO row is the expected gpio identifier number in the Linux kernel.

Each row includes the gpiochipX and pinY in the format of X Y. You can use these values to direcly control the GPIO pins with the commands shown below.

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset X Y=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset X Y=0

For Example:

+---------+----------+
| Pin     | P9.11    |
+=========+==========+
| GPIO    | 1 1      |
+---------+----------+

Use the commands below for controlling this pin (P9.11) where X = 1 and Y = 1

# to set the GPIO pin state to HIGH
debian@BeagleBone:~$ gpioset 1 20=1

# to set the GPIO pin state to LOW
debian@BeagleBone:~$ gpioset 1 20=0

The BALL row is the pin number on the processor.

The REG row is the offset of the control register for the processor pin.

The MODE # rows are the mode setting for each pin. Setting each mode to align with the mode column will give that function on that pin.

If included, the 2nd BALL row is the pin number on the processor for a second processor pin connected to the same pin on the expansion header. Similarly, all row headings starting with 2nd refer to data for this second processor pin.

NOTES:

DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.

NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.

P9.01-P9.05

P9.01

P9.02

P9.03

P9.04

P9.05

GND

GND

VOUT_3V3

VOUT_3V3

VIN

P9.06-P9.10

P9.06

P9.07

P9.08

P9.09

P9.10

VIN

VOUT_SYS

VOUT_SYS

RESET#

RESET#

P9.11-P9.13

Pin

P9.11

P9.12

P9.13

GPIO

1 1

1 45

1 2

BALL

AC23

AE27

AG22

REG

0x00011C004

0x00011C0B8

0x00011C008

Page

39

29

40

MODE 0

PRG1_PRU0_GPO0

PRG0_PRU0_GPO2

PRG1_PRU0_GPO1

1

PRG1_PRU0_GPI0

PRG0_PRU0_GPI2

PRG1_PRU0_GPI1

2

PRG1_RGMII1_RD0

PRG0_RGMII1_RD2

PRG1_RGMII1_RD1

3

PRG1_PWM3_A0

PRG0_PWM2_A0

PRG1_PWM3_B0

4

RGMII1_RD0

RGMII3_RD2

RGMII1_RD1

5

RMII1_RXD0

RMII3_CRS_DV

RMII1_RXD1

6

~

~

~

7

GPIO0_1

GPIO0_45

GPIO0_2

8

GPMC0_BE1n

UART3_RXD

GPMC0_WAIT0

9

RGMII7_RD0

~

RGMII7_RD1

10

~

~

~

11

~

~

~

12

MCASP6_ACLKX

MCASP0_ACLKR

MCASP6_AFSX

13

~

~

~

14

UART0_RXD

~

UART0_TXD

Bootstrap

~

~

~

P9.14-P9.16

Pin

P9.14

P9.15

P9.16

GPIO

1 93

1 47

1 94

BALL

U27

AD25

U24

REG

0x00011C178

0x00011C0C0

0x00011C17C

Page

56

30

56

MODE 0

RGMII5_RD3

PRG0_PRU0_GPO4

RGMII5_RD2

1

UART3_CTSn

PRG0_PRU0_GPI4

UART3_RTSn

2

~

PRG0_RGMII1_RX_CTL

~

3

UART6_RXD

PRG0_PWM2_B0

UART6_TXD

4

VOUT1_DATA8

RGMII3_RX_CTL

VOUT1_DATA9

5

TRC_DATA6

RMII3_TXD1

TRC_DATA7

6

EHRPWM2_A

~

EHRPWM2_B

7

GPIO0_93

GPIO0_47

GPIO0_94

8

GPMC0_A9

~

GPMC0_A10

9

~

~

~

10

~

~

~

11

~

~

~

12

MCASP11_AXR0

MCASP0_AXR2

MCASP11_AXR1

13

~

~

~

14

~

~

~

Bootstrap

~

~

~

P9.17-P9.18

Pin

P9.17

~

P9.18

~

GPIO

1 28

1 115

1 40

1 120

BALL

AC21

AA3

AH22

Y2

REG

0x00011C074

0x00011C1D0

0x00011C0A4

0x00011C1E4

Page

49

67

53

68

MODE 0

PRG1_PRU1_GPO7

SPI0_D1

PRG1_PRU1_GPO19

SPI1_D1

1

PRG1_PRU1_GPI7

~

PRG1_PRU1_GPI19

~

2

PRG1_IEP1_EDC_LATCH_IN1

I2C6_SCL

PRG1_IEP1_EDC_SYNC_OUT0

I2C6_SDA

3

~

~

PRG1_PWM1_TZ_OUT

~

4

SPI6_CS0

~

SPI6_D1

~

5

RMII6_RX_ER

~

RMII6_TXD1

~

6

MCAN7_TX

~

PRG1_ECAP0_IN_APWM_OUT

~

7

GPIO0_28

GPIO0_115

GPIO0_40

GPIO0_120

8

~

~

~

PRG0_IEP1_EDC_SYNC_OUT0

9

~

~

~

~

10

VOUT0_DATA7

~

VOUT0_PCLK

~

11

VPFE0_DATA15

~

~

~

12

MCASP4_AXR1

~

MCASP5_AXR1

~

13

~

~

~

~

14

UART3_TXD

~

~

~

Bootstrap

~

~

~

~

P9.19-P9.20

Pin

P9.19

~

P9.20

~

GPIO

2 1

1 78

2 2

1 77

BALL

W5

AF29

W6

AE25

REG

0x00011C208

0x00011C13C

0x00011C20C

0x00011C138

Page

19

38

19

37

MODE 0

MCAN0_RX

PRG0_PRU1_GPO15

MCAN0_TX

PRG0_PRU1_GPO14

1

~

PRG0_PRU1_GPI15

~

PRG0_PRU1_GPI14

2

~

PRG0_RGMII2_TX_CTL

~

PRG0_RGMII2_TD3

3

~

PRG0_PWM1_B1

~

PRG0_PWM1_A1

4

I2C2_SCL

RGMII4_TX_CTL

I2C2_SDA

RGMII4_TD3

5

~

~

~

~

6

~

~

~

~

7

GPIO1_1

GPIO0_78

GPIO1_2

GPIO0_77

8

~

~

~

~

9

~

~

~

~

10

~

~

~

~

11

~

~

~

~

12

~

MCASP2_AXR1

~

MCASP2_AXR0

13

~

~

~

~

14

~

UART2_RTSn

~

UART2_CTSn

Bootstrap

~

~

~

~

P9.21-P9.22

Pin

P9.21

~

P9.22

~

GPIO

1 39

1 90

1 38

1 91

BALL

AJ22

U28

AC22

U29

REG

0x00011C0A0

0x00011C16C

0x00011C09C

0x00011C170

Page

52

56

52

54

MODE 0

PRG1_PRU1_GPO18

RGMII5_TD0

PRG1_PRU1_GPO17

RGMII5_TXC

1

PRG1_PRU1_GPI18

RMII7_TXD0

PRG1_PRU1_GPI17

RMII7_TX_EN

2

PRG1_IEP1_EDC_LATCH_IN0

I2C3_SDA

PRG1_IEP1_EDC_SYNC_OUT1

I2C6_SCL

3

PRG1_PWM1_TZ_IN

~

PRG1_PWM1_B2

~

4

SPI6_D0

VOUT1_DATA5

SPI6_CLK

VOUT1_DATA6

5

RMII6_TXD0

TRC_DATA3

RMII6_TX_EN

TRC_DATA4

6

PRG1_ECAP0_SYNC_IN

EHRPWM1_A

PRG1_ECAP0_SYNC_OUT

EHRPWM1_B

7

GPIO0_39

GPIO0_90

GPIO0_38

GPIO0_91

8

~

GPMC0_A6

~

GPMC0_A7

9

VOUT0_VP2_VSYNC

~

VOUT0_VP2_DE

~

10

VOUT0_VSYNC

~

VOUT0_DE

~

11

~

~

VPFE0_DATA10

~

12

MCASP5_AXR0

MCASP11_AFSX

MCASP5_AFSX

MCASP10_AXR2

13

~

~

~

~

14

VOUT0_VP0_VSYNC

~

VOUT0_VP0_DE

~

Bootstrap

~

~

BOOTMODE1

~

P9.23-P9.25

Pin

P9.23

P9.24

~

P9.25

~

GPIO

1 10

1 119

1 13

1 127

1 104

BALL

AG20

Y5

AJ24

AC4

W26

REG

0x00011C028

0x00011C1E0

0x00011C034

0x00011C200

0x00011C1A4

Page

42

68

43

69

54

MODE 0

PRG1_PRU0_GPO9

SPI1_D0

PRG1_PRU0_GPO12

UART1_CTSn

RGMII6_RXC

1

PRG1_PRU0_GPI9

UART5_RTSn

PRG1_PRU0_GPI12

MCAN3_RX

~

2

PRG1_UART0_CTSn

I2C4_SCL

PRG1_RGMII1_TD1

~

~

3

PRG1_PWM3_TZ_IN

UART2_TXD

PRG1_PWM0_A0

~

AUDIO_EXT_REFCLK2

4

SPI6_CS1

~

RGMII1_TD1

SPI2_D0

VOUT1_DE

5

RMII5_RXD1

~

~

EQEP0_S

TRC_DATA17

6

~

~

MCAN4_RX

~

EHRPWM4_B

7

GPIO0_10

GPIO0_119

GPIO0_13

GPIO0_127

GPIO0_104

8

GPMC0_ADVn_ALE

PRG0_IEP1_EDC_LATCH_IN0

~

~

GPMC0_A20

9

PRG1_IEP0_EDIO_DATA_IN_OUT28

~

RGMII7_TD1

~

VOUT1_VP0_DE

10

VOUT0_DATA23

~

VOUT0_DATA17

~

~

11

~

~

VPFE0_DATA1

~

~

12

MCASP3_ACLKX

~

MCASP7_AFSX

~

MCASP10_AXR7

13

~

~

~

~

~

14

~

~

~

~

~

Bootstrap

~

~

~

~

~

P9.26-P9.27

Pin

P9.26

~

P9.27

~

GPIO

1 118

1 12

1 46

1 124

BALL

Y1

AF24

AD26

AB1

REG

0x00011C1DC

0x00011C030

0x00011C0BC

0x00011C1F4

Page

67

43

30

69

MODE 0

SPI1_CLK

PRG1_PRU0_GPO11

PRG0_PRU0_GPO3

UART0_RTSn

1

UART5_CTSn

PRG1_PRU0_GPI11

PRG0_PRU0_GPI3

TIMER_IO7

2

I2C4_SDA

PRG1_RGMII1_TD0

PRG0_RGMII1_RD3

SPI0_CS3

3

UART2_RXD

PRG1_PWM3_TZ_OUT

PRG0_PWM3_A2

MCAN2_TX

4

~

RGMII1_TD0

RGMII3_RD3

SPI2_CLK

5

~

~

RMII3_RX_ER

EQEP0_B

6

~

MCAN4_TX

~

~

7

GPIO0_118

GPIO0_12

GPIO0_46

GPIO0_124

8

PRG0_IEP0_EDC_SYNC_OUT0

~

UART3_TXD

~

9

~

RGMII7_TD0

~

~

10

~

VOUT0_DATA16

~

~

11

~

VPFE0_DATA0

~

~

12

~

MCASP7_ACLKX

MCASP0_AFSR

~

13

~

~

~

~

14

~

~

~

~

Bootstrap

~

~

~

~

P9.28-P9.29

Pin

P9.28

~

P9.29

~

GPIO

2 11

1 43

2 14

1 53

BALL

U2

AF28

V5

AB25

REG

0x00011C230

0x00011C0B0

0x00011C23C

0x00011C0D8

Page

18

29

68

31

MODE 0

ECAP0_IN_APWM_OUT

PRG0_PRU0_GPO0

TIMER_IO1

PRG0_PRU0_GPO10

1

SYNC0_OUT

PRG0_PRU0_GPI0

ECAP2_IN_APWM_OUT

PRG0_PRU0_GPI10

2

CPTS0_RFT_CLK

PRG0_RGMII1_RD0

OBSCLK0

PRG0_UART0_RTSn

3

~

PRG0_PWM3_A0

~

PRG0_PWM2_B1

4

SPI2_CS3

RGMII3_RD0

~

SPI3_CS2

5

I3C0_SDAPULLEN

RMII3_RXD1

~

PRG0_IEP0_EDIO_DATA_IN_OUT29

6

SPI7_CS0

~

SPI7_D1

MCAN10_RX

7

GPIO1_11

GPIO0_43

GPIO1_14

GPIO0_53

8

~

~

~

GPMC0_AD4

9

~

~

~

~

10

~

~

~

~

11

~

~

~

~

12

~

MCASP0_AXR0

~

MCASP0_AFSX

13

~

~

~

~

14

~

~

~

~

Bootstrap

~

~

BOOTMODE5

~

P9.30-P9.31

Pin

P9.30

~

P9.31

~

GPIO

2 13

1 44

2 12

1 52

BALL

V6

AE28

U3

AB26

REG

0x00011C238

0x00011C0B4

0x00011C234

0x00011C0D4

Page

68

29

18

31

MODE 0

TIMER_IO0

PRG0_PRU0_GPO1

EXT_REFCLK1

PRG0_PRU0_GPO9

1

ECAP1_IN_APWM_OUT

PRG0_PRU0_GPI1

SYNC1_OUT

PRG0_PRU0_GPI9

2

SYSCLKOUT0

PRG0_RGMII1_RD1

~

PRG0_UART0_CTSn

3

~

PRG0_PWM3_B0

~

PRG0_PWM3_TZ_IN

4

~

RGMII3_RD1

~

SPI3_CS1

5

~

RMII3_RXD0

~

PRG0_IEP0_EDIO_DATA_IN_OUT28

6

SPI7_D0

~

SPI7_CLK

MCAN10_TX

7

GPIO1_13

GPIO0_44

GPIO1_12

GPIO0_52

8

~

~

~

GPMC0_AD3

9

~

~

~

~

10

~

~

~

~

11

~

~

~

~

12

~

MCASP0_AXR1

~

MCASP0_ACLKX

13

~

~

~

~

14

~

~

~

UART6_TXD

Bootstrap

BOOTMODE4

~

~

~

P9.32-P9.35

P9.32

P9.34

VDD_ADC

GND

Pin

P9.33

~

P9.35

~

GPIO

~

1 50

~

1 55

BALL

K24

AC28

K29

AH27

REG

0x00011C140

0x00011C0CC

0x00011C148

0x00011C0E0

Page

20

31

20

32

MODE 0

MCU_ADC0_AIN4

PRG0_PRU0_GPO7

MCU_ADC0_AIN6

PRG0_PRU0_GPO12

1

~

PRG0_PRU0_GPI7

~

PRG0_PRU0_GPI12

2

~

PRG0_IEP0_EDC_LATCH_IN1

~

PRG0_RGMII1_TD1

3

~

PRG0_PWM3_B1

~

PRG0_PWM0_A0

4

~

PRG0_ECAP0_SYNC_IN

~

RGMII3_TD1

5

~

~

~

~

6

~

MCAN9_TX

~

~

7

~

GPIO0_50

~

GPIO0_55

8

~

GPMC0_AD1

~

~

9

~

~

~

~

10

~

~

~

DSS_FSYNC0

11

~

~

~

~

12

~

MCASP0_AXR5

~

MCASP0_AXR8

13

~

~

~

~

14

~

~

~

~

Bootstrap

~

~

~

~

P9.36-P9.37

Pin

P9.36

~

P9.37

~

GPIO

~

1 56

~

1 57

BALL

K27

AH29

K28

AG28

REG

0x00011C144

0x00011C0E4

0x00011C138

0x00011C0E8

Page

20

32

20

32

MODE 0

MCU_ADC0_AIN5

PRG0_PRU0_GPO13

MCU_ADC0_AIN2

PRG0_PRU0_GPO14

1

~

PRG0_PRU0_GPI13

~

PRG0_PRU0_GPI14

2

~

PRG0_RGMII1_TD2

~

PRG0_RGMII1_TD3

3

~

PRG0_PWM0_B0

~

PRG0_PWM0_A1

4

~

RGMII3_TD2

~

RGMII3_TD3

5

~

~

~

~

6

~

~

~

~

7

~

GPIO0_56

~

GPIO0_57

8

~

~

~

UART4_RXD

9

~

~

~

~

10

~

DSS_FSYNC2

~

~

11

~

~

~

~

12

~

MCASP0_AXR9

~

MCASP0_AXR10

13

~

~

~

~

14

~

~

~

~

Bootstrap

~

~

~

~

P9.38-P9.39

Pin

P9.38

~

P9.39

~

GPIO

~

1 58

~

1 54

BALL

L28

AG27

K25

AJ28

REG

0x00011C13C

0x00011C0EC

0x00011C130

0x00011C0DC

Page

~

33

20

32

MODE 0

MCU_ADC0_AIN3

PRG0_PRU0_GPO15

MCU_ADC0_AIN0

PRG0_PRU0_GPO11

1

~

PRG0_PRU0_GPI15

~

PRG0_PRU0_GPI11

2

~

PRG0_RGMII1_TX_CTL

~

PRG0_RGMII1_TD0

3

~

PRG0_PWM0_B1

~

PRG0_PWM3_TZ_OUT

4

~

RGMII3_TX_CTL

~

RGMII3_TD0

5

~

~

~

~

6

~

~

~

~

7

~

GPIO0_58

~

GPIO0_54

8

~

UART4_TXD

~

~

9

~

~

~

CLKOUT

10

~

DSS_FSYNC3

~

~

11

~

~

~

~

12

~

MCASP0_AXR11

~

MCASP0_AXR7

13

~

~

~

~

14

~

~

~

~

Bootstrap

~

~

~

~

P9.40-P9.42

Pin

P9.40

~

P9.41

P9.42

~

GPIO

~

1 81

2 0

1 123

1 18

BALL

K26

AA26

AD5

AC2

AJ21

REG

0x00011C134

0x00011C148

0x00011C204

0x00011C1F0

0x00011C04C

Page

20

38

69

68

45

MODE 0

MCU_ADC0_AIN1

PRG0_PRU1_GPO18

UART1_RTSn

UART0_CTSn

PRG1_PRU0_GPO17

1

~

PRG0_PRU1_GPI18

MCAN3_TX

TIMER_IO6

PRG1_PRU0_GPI17

2

~

PRG0_IEP1_EDC_LATCH_IN0

~

SPI0_CS2

PRG1_IEP0_EDC_SYNC_OUT1

3

~

PRG0_PWM1_TZ_IN

~

MCAN2_RX

PRG1_PWM0_B2

4

~

SPI3_D0

SPI2_D1

SPI2_CS0

~

5

~

~

EQEP0_I

EQEP0_A

RMII5_TXD1

6

~

MCAN12_TX

~

~

MCAN5_TX

7

~

GPIO0_81

GPIO1_0

GPIO0_123

GPIO0_18

8

~

GPMC0_AD14

~

~

~

9

~

~

~

~

~

10

~

~

~

~

~

11

~

~

~

~

VPFE0_DATA6

12

~

MCASP2_AFSX

~

~

MCASP3_AXR3

13

~

~

~

~

~

14

~

UART2_RXD

~

~

~

Bootstrap

~

~

~

~

~

P9.43-P9.46

P9.43

P9.44

P9.45

P9.46

GND

GND

GND

GND