Design & specifications#
If you want to know how BeagleV Ahead board is designed and what are it’s high-level specifications then this chapter is for you. We are going to discuss each hardware design element in detail and provide high-level device specifications in a short and crisp form as well.
Block diagram#
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Fig. 501 System block diagram#
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Fig. 502 I2C-Usage diagram#
System on Chip (SoC)#
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Fig. 503 SoC eMMC power switch#
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Fig. 504 SoC DDR Power#
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Fig. 505 SoC MIPI CSI DSI HDMI#
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Fig. 506 SoC power#
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Fig. 507 SoC sys, ADC, and Clock#
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Fig. 508 SoC USB GMAC Audio#
Power management#
Barrel jack#
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Fig. 509 Barrel jack power input#
0.8V DCDC buck#
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Fig. 510 0.8V DCDC buck converter#
3.3V DCDC buck#
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Fig. 511 3.3V DCDC buck converter#
1.8V LDO#
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Fig. 512 1.8V LDO regulator#
PMIC#
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Fig. 513 PMIC Buck#
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Fig. 514 PMIC Control#
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Fig. 515 PMIC LDO#
General Connectivity and Expansion#
microUSB 3.0 port#
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Fig. 516 microUSB 3.0 port#
P8 & P9 cape header pins#
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Fig. 517 P8 cape header#
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Fig. 518 P9 cape header#
mikroBUS shuttle connector#
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P8, P9, and mikroBUS helper circuitry#
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Fig. 519 P8, P9, and mikroBUS level shifters#
Wired and wireless connectivity#
Ethernet#
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Fig. 523 Ethernet#
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Fig. 524 Ethernet LevelShifter and Strapping#
WiFi & Bluetooth#
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Fig. 525 WiFi and Bluetooth#
Memory, Media and Data storage#
DDR memory#
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Fig. 526 2GB DDR4 Memory chip1#
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Fig. 527 2GB DDR4 Memory chip2#
eMMC#
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Fig. 528 16GB eMMC#
microSD#
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Fig. 529 microSD card connector#
EEPROM#
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Fig. 530 16GB EEPROM#
Multimedia I/O#
CSI0#
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Fig. 531 CSI0 camera interface#
CSI1#
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Fig. 532 CSI1 camera interface#
DSI#
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Fig. 533 DSI display interface#
CSI & DSI level shifter#
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Fig. 534 CSI & DSI level shifter#
HDMI#
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Fig. 535 HDMI display interface#
Debug#
UART debug port#
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Fig. 536 UART Debug port#
JTAG debug port#
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Fig. 537 JTAG debug port#
Mechanical Specifications#
Parameter |
Values |
---|---|
Size |
96.5×60.7×19.9mm |
Max heigh |
21.1mm |
PCB Size |
96.5x60.5*1.6mm |
PCB Layers |
10 layers |
PCB Thickness |
1.6mm |
RoHS compliant |
yes |
Gross Weight |
128.8g |
Net weight |
49.7g |